1. Field of the Invention
The present invention relates to a distributed amplifier and, more particularly, to a distributed amplifier formed from a high electron mobility transistor (HEMT) and a heterojunction bipolar transistor (HBT) configured in a cascode arrangement which, by virtue of the HBT's high breakdown voltage, provides relatively higher output power relative to known distributed amplifiers; the HEMT/HBT cascode being suitable to being formed as a monolithic microwave integrated circuit (MMIC).
2. Description of the Prior Art
Distributed amplifiers are known to be used for wide bandwidth applications. Examples of early distributed amplifiers formed with vacuum tubes are disclosed in: "Distributed Amplification", by F. L. Ginzton, W. R. Hewlett, J. H. Jasberg, and J. D. Noe, PROC. IRE, Vol. 36, pp. 956-969, August 1948; "Principles and Design of Linear Active Circuits", by M. S. Ghausi, Ch. 13, McGraw-Hill 1965; and British Patent No. 460,562, January 1937. With the development of the transistor, the vacuum tubes in the distributed amplifier circuits were replaced with common source field effect transistors (FET), for example, as disclosed in: "MESFET Distributed Amplifier Design Guidelines", by J. P. Beyer, S. N. Prasad, R. C. Becker, J. E. Nordman, and G. K. Hohenwarter, IEEE Transactions on Microwave Theory and Techniques, Vol. MTT-32, No. 3, March 1984, pp. 268-275; and "On Gain-Bandwidth Product for Distributed Amplifiers", by R. C. Becker and J. B. Beyer, IEEE Transactions on Microwave Theory in Techniques, Vol. MTT-34, No. 6, June 1986, pp. 736-738, and as generally shown in FIG. 1. For simplicity, the gate and drain (collector) bias voltages for the distributed amplifier has been ignored as have the capacitors for AC grounding of the line termination resistors. The bias voltage and grounding capacitors are known in the art and are unnecessary to an understanding of the invention.
Referring to FIG. 1, a plurality of FETs, 4 for example, 22, 24, 26 and 28, are connected in a common source configuration. In the configuration shown in FIG. 1, input and output capacitances for each of the FETs 22, 24, 26 and 28, are combined with inductances 34-52 to form artificial transmission lines, generally identified with the reference numerals 30 and 32. The drain terminals of all the FETs 22, 24, 26 and 28 are coupled together by way of the lumped or distributed inductances or transmission lines 34, 38, 42, and 46 and connected to an AC ground by way of a drain line termination impedance represented as the resistor R.sub.DT, which is generally chosen to match the characteristic impedance of the output line. The gate terminals of each of the FETs 22, 24, 26 and 28 are coupled together by way of the inductances 40, 44, 48 and 52 and terminated to an AC ground by way of a gate line termination resistance, illustrated as R.sub.gt, selected to be relatively equal to the characteristic impedance of the input transmission line. While such common source FET distributed amplifiers are able to provide a relatively flat, low-pass response up to relatively high frequencies, such amplifiers are known to have drawbacks. For example, with such a configuration, the performance of the amplifier can be improved by increasing the transconductance of the FETs. Unfortunately, measures to increase the transconductance g.sub.m by increasing either the bias current and/or increasing the gate width also increase the output conductance g.sub.o. Unfortunately, increase in the output conductance g.sub.o can cause significant losses in the output line, thereby limiting the number of stages which can be used in the distributed chain, as well as reducing the gain-bandwidth product of the amplifier. Another problem with such common source distributed amplifiers relates to the gate-drain capacitances of the FETs which cause parasitic feedback from the output to the input. The feedback, known as the Miller effect, makes the devices non-unilateral at higher frequencies, causing various problems, including a reduced gain-bandwidth product, response ripple, and poor isolation.
In order to solve the various problems associated with common source FET distributed amplifiers, a cascode configured device, as generally illustrated in FIG. 2, and generally identified with the reference numeral 54 was developed. The known distributed amplifier 54, shown without bias voltage and capacitors for grounding the line termination resistors for simplicity as discussed above, is shown with four stages, for example. Each stage includes a pair of FETs 56, 58, 60, 62, 64, 66, 68, and 70, connected in a cascode configuration. In such a cascode configuration, the FETs 58, 62, 66 and 70 are connected in a common source configuration and are used to drive the FETs 56, 60, 64 and 68, which, in turn, are connected in a common gate configuration. The drain terminals of the FETs 56, 60, 64 and 68, are coupled together by way of the lumped inductances 72, 76, 80 and 84 and connected to an AC ground by way of a drain line termination resistance R.sub.DT. The gate terminals of the FETs 58, 62, 66 and 70 are coupled together by way of the inductances 78, 82, 86 and 90 and connected to an AC ground by way of a gate line termination resistance R.sub.gt. The gate terminals each of the FETs 56, 60, 64 and 68, are coupled together and connected to an AC ground by way of a capacitor 92.
The cascode configuration illustrated in FIG. 2 has an output resistance as a result of the common gate configuration that is much higher than a comparable common source device as illustrated in FIG. 1, which allows for a higher transconductance g.sub.m without degrading the output line by way of a large output conductance g.sub.o. Unfortunately, some FETs (especially HEMTs) have relatively low gate-to-drain breakdown voltages (i.e., 3-7 v.) which constrains the output voltage swing to be relatively small, which limits the RF output power which can be achieved across a 50 W load.